Thursday, 28 April 2011
VHDL lab
We started our VHDL project today, it was some hard shit which we never heard about.
Basically we only did one thing this afternoon: Follow EVERY single thing what the PDF told us. =.=
Well yeah, we did manage to finish the S.T.E.P.S we were told to, and the programming was right, but the board was NOT working :O
Haiz, hope its not our fault, and it BETTER be the board's fault :D
Our friend Alvin here is trying his best to connect the circuits :D
The completed circuit :)
The view from my lab was not bad
p.s i'm the middle of 'catching snake' :D
Well, some afternoon i had. And i have to do all this while my stomach grinding LOL. Sorry for the low quality pics :)
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